PORRITTINC
( LAYTON, UT )
DATASHEET · PORRITT INC.

HPC Compute
reference
architecture.

Energy-adjacent, liquid-cooled, vendor-open compute halls operated by the same supervisory layer that runs the generation, with the full software stack to run the machine.

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DESIGN TARGET · NOT MEASURED PERFORMANCE

Figures on this page are engineering design targets and reference-architecture values, not measured results from operating hardware. They state what the design is being engineered to achieve. Verified performance data will replace them as systems are built and tested. Nothing here should be relied upon as a performance warranty.

Specification
SITING

Behind the meter

Co-located with generation. Interconnection queue position is not on the critical path.

THERMAL

Direct liquid cooling

DLC as the primary path, with defined facility-loop interface and N+1 rejection.

SILICON

Vendor-open

Interfaces, thermals, and power are specified; accelerator selection remains a later procurement decision. No vendor partnership is claimed.

SOFTWARE

Full stack included

Provisioning, scheduling, orchestration, telemetry, and plant-aware workload placement.

At a glance
BTM
Siting
DLC
Thermal
OPEN
Silicon
PROPOSAL
Reference design
Regulatory note

Regulatory citations describe the framework the programme is built against. Applicability depends on the facility, its licence basis, and its jurisdiction — confirm applicable requirements for your site before relying on any mapping.

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